Low Loss Chip-to-Chip Couplers for High Density Co-Packaged Optics

Low Loss Chip-to-Chip Couplers for High Density Co-Packaged Optics

Citation

Weninger, D., Serna, S., Ranno, L., Kimerling, L., & Agarwal, A. (2024). Low Loss Chip-to-Chip Couplers for High Density Co-Packaged Optics. Journal of Hypothetical Examples, Volume Number(Issue Number), Page numbers.

Keywords

  • Co-packaged optics (CPO)
  • Silicon nitride (Si3N4)
  • Silicon (Si)
  • Evanescent coupler
  • Chip-to-chip coupling
  • Vertical coupling
  • Low loss
  • High density
  • Passive assembly
  • Alignment tolerance
  • Thermal stability

Brief

This article presents the experimental demonstration of a vertical chip-to-chip evanescent coupler between silicon nitride and silicon, achieving a coupling loss of 0.39 dB at 1550 nm wavelength.

Summary

This article presents the first experimental demonstration of a vertical chip-to-chip evanescent coupler that directly connects silicon nitride (Si3N4) and silicon (Si) waveguides. This coupler design offers a solution for the growing demand for high-bandwidth capacity in data centers, which are facing limitations with traditional copper interconnects.

Here are the key findings from the study:

  • Low Coupling Loss: The coupler achieved a coupling loss of 0.39 dB at 1550 nm, the lowest reported for a silicon-based evanescent inter-chip coupler. It maintained a low average coupling loss of 0.73 dB across a broad wavelength range (1480-1640 nm), covering the C-band, S-band, and L-band.
  • High Alignment Tolerance: The coupler demonstrated an average 1-dB lateral alignment tolerance of 1.38 µm across the 1480-1640 nm wavelength range. This relatively large tolerance makes it suitable for passive assembly using pick-and-place tools, which is crucial for high-volume manufacturing of photonic integrated circuits (PICs).
  • Thermal Stability: The coupler's performance remained stable under varying temperatures, with the coupling loss and alignment tolerance changing by less than ± 0.35 dB and ± 30 nm, respectively, from 20-60°C.
  • Repeatability: The study confirmed the repeatability of the coupler design by demonstrating consistent performance across four separately packaged die.

This coupler's low loss, high alignment tolerance, thermal stability, and repeatability make it a promising solution for high-density, scalable optical interconnects in future co-packaged optics (CPO) systems. The use of silicon-based materials (Si3N4 and SOI) makes it compatible with standard CMOS fabrication processes, further enhancing its potential for large-scale integration in data centers and other high-performance computing applications.

Origin: opticaopen.org

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